Dhairya Baxi

Postgraduate Student
HiCAPS Lab (Prof. Uday Bondhugula)
Department of Computer Science and Automation
Indian Institute of Science, Bangalore

Education

Indian Institute of Science, Bangalore
Master of Technology · Computer Science and Engineering (2025 – Present)
Department of Computer Science and Automation
Institute of Technology, Nirma University
Bachelor of Technology · Computer Science and Engineering (2021 – 2025)

Experience

Scalable Compilers for Heterogeneous Architectures Group, IIT Hyderabad
Research Internship · December 2024 – August 2025
  • Worked on compiler optimization projects under the guidance of Dr. Ramakrishna Upadrasta.
  • Developed, refactored, and benchmarked MLIR passes and related infrastructure.
  • Performed performance evaluation, plotting, and automation scripting.
  • Technologies: C++, CMake, MLIR, torch-mlir, ISL, Barvinok
TuskerAI
Summer Research Internship · April – July 2024
  • Developed Quantum-Gated GRU (QG-GRU), integrating quantum circuits with traditional GRUs.
  • Conducted experiments and prepared results for presentation.
  • Technologies: Qiskit, PyTorch, Python, Matplotlib

About

I am an M.Tech student in Computer Science and Automation at IISc. I love programming and computer science in general. Recently, I've developed a special interest in compilers and polyhedral compilation. In addition I love learning about Deep Learning, Security, Quantum Computing, and many more things.

Publication

PolyUFC: Polyhedral Compilation Meets Roofline Analysis for Uncore Frequency Capping
Nilesh Rajendra Shah, M V V S Manoj Kumar, Dhairya Baxi, and Ramakrishna Upadrasta
2026 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)

We present PolyUFC, an MLIR based compilation flow for uncore frequency capping that combines (performance and power) roofline analyses and polyhedral compilation-based static analysis for characterization of affine programs. We introduce a parametric mathematical model that links operational intensity and uncore frequency to derive frequency caps, validated through empirical evaluation on real hardware. By embedding these caps into Pluto optimized code generated by Polygeist, we achieve improvements in Energy Delay Product (EDP) up to 42% on compute-bound, and up to 54% on bandwidth-bound programs—carefully selected from ML-models from vision/NLP domains and PolyBench—over Intel UFS driver. Our framework is retargetable across multiple micro-architectures; and can handle multiple optimization goals like performance, energy and EDP, and is applicable across inter/intra dialects.

Projects

Polyqsim · GitHub
QASM2 to MLIR Affine for statevector quantum circuit simulation

Polyqsim is a tool that translates QASM2 quantum assembly code into the MLIR Affine dialect, enabling integration of quantum programs into MLIR polyhedral optimization infrastructure for efficient statevector simulation.

FianchettoAD · GitHub
Automatic Differentiation

FianchettoAD is a programming language that supports automatic differentiation (autodiff) out of the box. With FianchettoAD, you can easily compute derivatives of functions without having to implement differentiation manually. The language is currently under development and is incomplete.

Contact